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Samsung and SK Hynix Accelerate CXL Memory Race Amid AI Data Surge

7/20/2026, 12:32:06 PM

Core Event: Mass-Production Plans for CXL 3.2 Memory Modules

South Korean chipmakers Samsung Electronics (005930 KS) and SK Hynix (000660 KS) announced parallel pushes to mass-produce Compute Express Link (CXL) memory using the latest CXL 3.2 specification. Samsung said its “CXL Memory Module (CMM-D) 3.0,” upgraded from CXL 3.1 to 3.2, will enter mass production by the end of 2026. SK Hynix unveiled samples of a second-generation “CMM-DDR5” product built on CXL 3.2 at the HPED 2026 exhibition and has begun full-scale customer sales efforts. Both products claim roughly double the bandwidth of their predecessors.

Background & Context

CXL has emerged as the next-generation memory interconnect after high-bandwidth memory (HBM). Existing AI servers rely on a hierarchy of HBM -> DDR -> SSD, where expanding HBM or DDR capacity requires adding more GPUs or CPUs, inflating costs. CXL enables a separate memory tier that can be linked to GPUs and CPUs via a high-speed “data highway,” delivering latency in the few-hundred-nanosecond range while dramatically increasing capacity at lower cost.

Technical Advances & Data

  • CXL 3.2 Feature: Introduces the CXL Hot-Page Monitoring Unit (CHMU), which tracks real-time data-access frequency and optimizes movement across memory devices.
  • SK Hynix IMTE Architecture: Adds a “CXL hybrid memory” layer between HBM/DDR and SSD, improving AI inference efficiency by 35.7 %. The hierarchy expands to HBM -> DDR -> CXL memory -> SSD, with CXL memory offering several-to-tens of terabytes and speeds intermediate between DDR and SSD.
  • Samsung Performance Claim: Its CXL 2.0 memory (CMM-D 2.0) attains 92 % of the AI inference performance of the latest DDR5 DRAM. Samsung is also developing “CMM-Hybrid (H),” combining DRAM and NAND flash.
  • Market Forecast: Goldman Sachs projects global monthly AI token usage to rise 24-fold from 5,000 trillion this year to 120 quintillion by 2030. One token occupies four bytes, pushing required AI-model storage into the tens-of-terabytes range. SK Chairman Tae-won Choi warned that growing token usage expands the KV cache that stores computation results.

Why It Matters

CXL’s ability to expand memory without adding GPUs or CPUs could lower the cost of scaling AI servers, a critical factor as large language models demand ever-larger “cold-data” storage. By acting as a hub that pre-fetches data from SSDs for HBM and DDR, CXL memory transforms SSDs from passive archives into active computation aids, potentially reshaping data-center architectures worldwide.

Official Statements & Responses

Samsung’s white paper highlighted the 92 % DDR5-level inference performance of its CXL 2.0 module and outlined plans for the hybrid DRAM-NAND product. SK Hynix’s presentation of the IMTE architecture emphasized the 35.7 % efficiency gain and its readiness for customer sales. U.S.–based Micron is accelerating development of CXL 3.1/3.2 products following its 2023 launch of the CXL 2.0 “CZ120.” Nvidia, Intel, AMD and Microsoft have also announced CXL-compatible chips or cloud services, signaling broad industry endorsement.

Criticism & Opposition

An industry official cautioned that “CXL memory is still in the early stages of commercialization, but like HBM, customers may need it at any time, so suppliers are preemptively developing the technology and preparing for competition.”

Conflicting Reports & Gaps

SK Hynix did not disclose a precise mass-production timeline, contrasting with Samsung’s end-2026 target. No independent performance benchmarks beyond the companies’ own claims have been released.

Verbatim Quote

> “CXL memory is still in the early stages of commercialization, but like HBM, customers may need it at any time, so suppliers are preemptively developing the technology and preparing for competition.” — industry official