Full Breakdown
CXMT Launches Fifth-Generation G5 DRAM Platform into Mass Production
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Core Announcement and Technical Milestones
On September 20, 2026, ChangXin Memory Technologies (CXMT) announced at the World Manufacturing Convention in Hefei that its fifth-generation DRAM platform, G5, has entered mass production. The G5 platform uses self-aligned quadruple patterning (SAQP) to shrink the active-area half-pitch to 11.95 nm, a capacitor aspect ratio of 45:1 and a core-cell height of 6,762 nm with a high-k metal gate (HKMG) process. CXMT said the new process yields at least a 50 % increase in gross dies per wafer versus the fourth-generation platform, using an 8-Gb baseline. Two LPDDR5X products built on G5, each offering 24 Gb per die (50 % more capacity), are now in volume production in 496-ball and 245-ball packages for smartphones and other portable electronics.
Background and Market Context
CXMT, listed on Shanghai’s STAR Market, is China’s largest domestic DRAM producer. The global DRAM market remains dominated by Samsung, SK Hynix and Micron, which together held roughly 87 % of Q2 2026 revenue (TrendForce). Counterpoint Research estimated CXMT’s share at 10 % in Q2 2026, up from 4 % a year earlier.
Data and Statistics
- Active-area half-pitch: 11.95 nm
- Capacitor aspect ratio: 45:1
- Core-cell height: 6,762 nm
- Die-per-wafer increase: >=50 % vs. fourth-gen (CXMT)
- LPDDR5X capacity: 24 Gb per die, 50 % higher than previous generation
- Market share: 10 % of global DRAM revenue in Q2 2026 (Counterpoint)
- Revenue growth: 874 % YoY for the six months ended June 30, 2026
- Stock reaction: shares rose 2.6 % to 56.97 CNY on September 21, 2026
Official Statements & Responses
CXMT’s vice president and head of marketing, Luo Xiaodong, said the company’s process capability is now comparable with the most advanced mass-produced nodes. CXMT added that the G5 platform “strengthens supply-chain resilience” and narrows the gap with leading memory platforms. Analyst Ma Jihua noted the advance could bolster China’s self-reliance and give downstream manufacturers more sourcing options.
Conflicting Reports & Gaps
CXMT’s die-per-wafer figure counts all patterned chips before defect screening; actual yield rates and shipment volumes were not disclosed. Independent performance comparisons with Samsung, SK Hynix or Micron nodes are absent, and CXMT did not name handset makers that have qualified the new LPDDR5X products.
Verbatim Quotes
“Our process capability is now ?on par with the most advanced mass-produced nodes out there in the industry,” — Luo Xiaodong, CXMT vice president
Why It Matters
The G5 rollout shows a Chinese DRAM maker can achieve sub-12-nm density without EUV lithography, a capability previously limited by U.S. export restrictions. If the platform meets its density and cost targets, it could diversify global DRAM supply and add pricing pressure on commodity memory segments.
What’s Next
CXMT plans to build a NAND flash line at a new Beijing facility and continues development of high-bandwidth memory (HBM) and trial production of LPDDR6, aiming to expand its presence in mobile and data-center memory markets.
