Full Breakdown
Jupiter Integrates First European-Designed Rhea1 CPUs
By Drooid · · How we work
Core Event
French chip designer SiPearl has begun delivering its Rhea1 CPUs to Bull for integration into the Jupiter supercomputer, the European Union’s first exascale system. The delivery marks the first time a European-designed processor will power a European-built platform within Jupiter’s CPU-only partition.
Background & Context
Jupiter entered service last year as the EU’s inaugural exascale machine and currently ranks fifth on the Top500 list. Its high-performance “Booster” section relies on 24,000 Nvidia-made GH200 superchips, a U.S. component. The new Rhea1 CPUs, based on Arm’s Neoverse V1 cores, are intended to diversify the architecture and reduce reliance on foreign silicon.
Technical Details & Scale
Each Rhea1 package contains 80 cores, 61 billion transistors, four HBM2e stacks (64 GB total) delivering 1.8 TB/s bandwidth, and four DDR5 channels. When fully installed, the CPU partition will comprise 1,300 nodes (2,600 processors) with an estimated 5 petaFLOPS output—significant for workloads that cannot exploit GPU acceleration.
Why It Matters
The Rhea1 integration demonstrates progress toward a sovereign European high-performance computing ecosystem, reducing dependence on non-European processors for critical scientific workloads. By pairing the CPU partition with the existing GPU-based Booster, Jupiter aims to support a broader range of applications—from climate modeling to AI research—while showcasing the capabilities of the European Processor Initiative.
Verbatim Quotes
- “Its high memory bandwidth is particularly well suited to applications that benefit from efficient access to large amounts of data. Bringing this European processor technology into JUPITER is an important step in making these capabilities available to the scientific community,” — Thomas Lippert, director of the Jülich Supercomputing Centre
- “Rhea1 plays an important role in JUPITER’s Cluster Module, complementing the GPU-based Booster with a CPU-based architecture designed for a broad range of complex and data-intensive workloads,” — Prof. Dr. Thomas Lippert, director of the Jülich Supercomputing Centre