Full Breakdown
Huawei Mass-Produces Kirin 9050 Pro Chip Using Logic-Folding Technology
By Drooid · · How we work
Core Announcement and Technical Milestones
Huawei convened a Kirin-chip technology exchange conference at its Lianqiu Lake R&D Center in Shanghai on the 13th of the month. Xu Songyu, head of the Wireless Device Chip Product Management division of Huawei’s Semiconductor Business, announced that the Kirin 9050 series is the first to achieve mass production of logic-folding technology and presented the complete architecture diagram of the flagship Kirin 9050 Pro. He also confirmed that the next-generation 2027 Kirin chip has entered testing, with all results meeting expectations and setting the stage for a decade-long evolution of the technology.
Technical Details and Performance Gains
The Kirin 9050 Pro employs a 16-thread Lingxi CPU and a nine-core configuration built on a three-dimensional stacked “logic-folding” architecture. Huawei’s data indicate a 53.5 % increase in transistor density versus the prior generation. The chip delivers a 41 % improvement in large-core CPU energy efficiency and a 140 % boost in NPU computing power. The disclosed architecture integrates a next-generation Lingxi CPU, Maliang GPU, Da Vinci NPU, Kirin AI ISP, Balong AI modem, FFTS task scheduler, audio-video processor, security processor, and a Lingxi micro-core.
Market Context and Production History
After the 2020 launch of the Kirin 9000, Huawei’s chip business faced supply restrictions that limited shipments until mobile phones powered by Kirin chips returned to market in August 2023. Since then, cumulative shipments of Kirin-based terminal products have exceeded 100 million units. The broader Chinese integrated-circuit sector produced 53 billion chips in July, averaging about 1.7 billion chips per day, according to official data. Market-research firm Omdia raised its 2026 forecast for China’s semiconductor market to $812.08 billion, reflecting strong domestic demand in AI, automotive electronics, and industrial control.
Official Outlook and Future Plans
Xu Songyu emphasized that the 2027 Kirin chip is already in the testing phase and that current results align with the company’s expectations, providing a foundation for continued logic-folding development. He also acknowledged early uncertainty in the technology’s development, noting that industry tools and solutions were initially unavailable, but that step-by-step progress has consistently met or exceeded targets.
Implications for China’s Semiconductor Landscape
Logic-folding represents a shift from traditional geometric scaling to temporal scaling, allowing critical computing units and SRAM cache to be positioned vertically, shortening signal paths and reducing latency. Combined with China’s full-chain semiconductor capability—from design to packaging—the technology positions Huawei to meet the nation’s expanding high-performance-chip demand and could influence future AI and automotive applications across the domestic market.
