Full Breakdown
Tata Electronics-ASML MoU to Build India’s First 300-mm Semiconductor Fab
5/22/2026, 2:19:06 AM
Strategic Partnership Overview
On 16 May 2026, Tata Electronics and ASML signed an MoU in The Hague, attended by PM Narendra Modi and Dutch PM Rob Jetten. ASML will supply lithography tools for Tata’s 300 mm fab in Dholera, Gujarat, and support talent and supply-chain development.
Policy Context
The MoU advances India’s Semiconductor Mission and “Make in India” plan, which earmark over $20 bn for chip projects. The government will co-invest 50 % of the Dholera fab’s INR450 bn ($5.5 bn) capital to cut import reliance.
Key Figures
The deal involves Tata Electronics CEO Randhir Thakur, ASML President Christophe Fouquet, Prime Ministers Narendra Modi and Rob Jetten, and Taiwanese partner PSMC for process licences.
Project Scale & Timeline
Investment totals US $11 bn (? INR9.5 bn). The 300 mm line will run 28-110 nm nodes. Groundbreaking began early 2026; ASML tools arrive late 2026; first chips are slated for late 2026, with volume production aimed for FY 2029-30.
Strategic Impact
Access to ASML’s lithography places India in the exclusive EUV supply chain, even though the fab will start with DUV mature nodes. The partnership reduces lithography risk, builds talent pipelines, and bolsters supply-chain resilience for automotive, AI and mobile markets.
Official Statements
Tata’s CEO highlighted ASML’s holistic lithography as vital for a timely ramp-up. ASML’s CEO called the MoU a milestone and pledged long-term support. Modi framed the pact as a step toward a stronger India-Netherlands technology partnership.
Criticism
Analysts note that lithography tools alone cannot guarantee fab success. Greyhound Research’s Sanchit Vir Gogia warned that “ASML de-risks the lithography layer. It does not de-risk the fab,” citing gaps in process engineering, yield learning and local material supply. China’s dominance in rare-earths remains a strategic risk.
Conflicting Reports
Sources cite the fab’s cost as US $11 bn or €9.5 bn, a minor discrepancy. While ASML’s EUV capability is mentioned as a future option, the current plan uses DUV tools for mature nodes. Timelines for talent development and domestic raw-material sourcing are not detailed.
Verbatim Quotes
- “Signing this Memorandum of Understanding today marks an important milestone, and we look forward to close collaboration with Tata Electronics and its broader ecosystem.” — Christophe Fouquet, President & CEO, ASML
- “PM Modi Highlights Growing Technology Collaboration Prime Minister Narendra Modi said the agreement reflects the strengthening relationship between India and the Netherlands in emerging and future technologies.” — Narendra Modi, Prime Minister of India
- “ASML de-risks the lithography layer. It does not de-risk the fab” — Sanchit Vir Gogia, Greyhound Research
Future Outlook
ASML will start phased DUV tool delivery in late 2026, followed by clean-room commissioning and PSMC technology transfer. Successful silicon runs will expand training programmes and could enable future EUV upgrades, pending supply-chain security and policy support.
